This invention relates to the interpolation of data in a speech synthesis circuit and especially to such speech synthesis circuits integrated on a semiconductor integrated circuit chip.
Several techniques are known in the prior art for digitizing human speed. For example, pulse code modulation, differential pulse code modulation, adaptive predictive coding, delta modulation, channel vocoders, cepstrum vocoders, format vocoders, voice excited vocoders and liner predictive coding techniques of speech digitalization are known. The techniques, are briefly explained in "Voiced Signals: Bit by Bit" on pages 28-34 of the October 1973 issue of IEEE Spectrum.
In certain applications and particularly those in which the digitized speech is to be stored in a memory tend to use the linear predictive coding technique because it produces very high quality speech using rather low data rates. Linear predicitve coding systems usually make use of a multi-stage digital filter. In the past, the digital filter has typically been implemented by approximately programming a large scale digital computer. However, in U.S. Pat. application Ser. No. 807,461, filed June 17, 1977 and now abandoned, there is taught a particularly useful digital filter for a speech synthesis circuit, which digital filter may be implemented on an integrated circuit using standard MOS or equivalent technology. A theoretical discussion of linear predictive coding can be found in "Speech Analysis and Synthesis by Linear Predictive of the Speech Wave" at Volumn 50, number 2 (part 2) of The Journal of the Acoustical Society of America.
Disclosed herein is a talking learning aid which utilizes speech synthesis technology for producing human speech. A complete talking learning aid is disclosed, so, in addition to describing the speech synthesis circuits in detail, this patent also discloses the details of the learning aid's controller and the Read-Only-Memory devices used to store the digitized speech. Of course, those practicing the present invention may wish to practice the invention in conjunction with a talking learning aid, such as that described herein, other learning aids or in any other application wherein the generation of human speech from digital data is desirable. Using the techniques described in the aforementioned U.S. Pat. application Ser. No. 807,461 which is now abandoned and the teachings of this patent permit those desiring to make use of digital speech technology to do so with one, or a small number, of relatively inexpensive integrated circuit devices.
This invention relates to interpolation of data in a speech synthesis circuit, as aforementioned. By interpolating the speech data applied to the speech synthesis circuit the data rate required by the synthesis circit to reproduce speech of a given quality level is effectively reduced. It was, therefore, one object of this invention to provide a speech data parameter interpolator for a voice synthesis circuit, and especially, an interpolator compatible with a synthesis circuit integrated on a semiconductor chip. It was yet another object of this invention to provide an interpolator having a small number of components so as to take a minimum amount of surface area of the aforementioned chip.
The foregoing objects are achieved as is now described. The speech synthesis circuit includes an input circuit for receiving new target values of various speech parameters and a memory for storing the interpolated values of the parameters. The interpolater includes a subtractor circuit arranged to calculate the difference between the target values of the parameters and the stored values. A portion of the differences calculated are added back to the values stored in the memory, the particular portion being selected according to the formula 1/2N where N=0, 1, 2. . . In the embodiment disclosed, the circuit which performs this division is a delay circuit which preferably delays a serial train of data from the memory by a selectable amount before the difference is added thereto in an adder. The interpolator also preferably includes means for disabling the interpolation in resonse to charges from voiced to unvoiced speech and visa versa, for instance.